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B302DA-PCIe: 8-Channel AC→TTL Sense Module

B302DA Block Diagram
Module Purpose

Detects 85–265 VAC (line-neutral) presence per channel and reports it as 3.3V TTL to the host via qSlot. Uses PCIe Mini Card mechanically only; PCIe lanes are not used.

Architecture Overview

Each channel includes AC conditioning (series impedance + full-wave rectifier), optical isolation (opto LED / phototransistor), and TTL output driver. HV and LV domains are physically separated by creepage/clearance rules.

AC Input and Thresholding

The AC line drives the opto LED through a series impedance network and a full-wave bridge rectifier. When LED current exceeds the threshold, the phototransistor turns on. For industrial use, 1–3 mA LED current is a good balance for power loss and EMC.

Flicker Suppression

Half-wave ripple can cause output chatter. This module applies RC integration at the TTL driver with ~20–50 ms to deliver a stable presence report.

Optical Isolation and TTL Stage

On the LV side, the output is driven as 3.3V TTL active LOW (AC present → LOW, AC absent → HIGH). Choose push‑pull or open‑drain + pull‑up per host GPIO characteristics.

EMC and Safety

  • Creepage/Clearance ≥ 6 mm across HV/LV regions and keep‑outs.
  • Current Limiting: Opto LED current remains safe even at 265 VAC peak; series impedance power rating must survive worst‑case faults.
  • Snubber/RC: Add input RC/snubber for transients; ferrite beads on LV side for common‑mode noise.
Electrical Safety

High voltage module. Install and service by qualified personnel only. Do not modify while powered; maintain HV/LV segregation.

qSlot Interface

qSlot serves as the power and GPIO carrier. 8× TTL outputs map directly to qSlot DIO/GPIO lines; 3.3V, GND, and control lines (e.g., PWR_EN/COMM_EN) operate with the carrier. qSlot uses PCIe Mini Card mechanically only; PCIe differential lanes are not used. Signal rules are optimized for TTL/CMOS levels.

Downloads

All design and production sources: Github B302DA

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