Reliability and Durability Checklist

This checklist is prepared to verify long-term durability, life expectancy, and performance against field conditions of hardware products. The goal is to integrate "*reliability by test" approach into early stage of product lifecycle.

General Reliability Planning​

1. Is target life (Design Life) defined for product?​

Product design life should be determined according to usage scenarios and market segment.

Target life should be clearly stated in design requirements document ("Product Requirement Specification"), validation tests should be selected according to this target.

2. Are MTBF (Mean Time Between Failures) or FIT (Failure in Time) calculations performed?​

Product's statistical reliability value should be calculated from component-based failure rates:

• Standards: MIL-HDBK-217F, Telcordia SR-332 Issue 4, FIDES Guide 2009
• Input parameters: temperature profile, stress factor, duty cycle
• Output parameters: MTBF (in hours) and FIT (failures per 10⁹ hours)
• Software tools: RelCalc, Windchill, Siemens Reliasoft, FMEA-Pro, etc.

Results should be documented in "Reliability Prediction Report" and compared with design target.

3. Is derating analysis performed for critical components?​

Operating critical components (FET, capacitor, regulator, connector) below nominal limits significantly extends product life. Derating targets:

• Voltage 70–80% of nominal or below
• Current 80% of nominal or below
• Temperature Tmax – 10 °C or below

Derating table should be created especially for power electronics, LED drivers, battery circuits, and high-frequency lines. "Component Stress Analysis Report" should be approved during Design Review phase.

4. Is reliability test plan written (Reliability Test Plan – RTP)?​

Product-specific reliability test plan (RTP) should include test scope and acceptance criteria. RTP document should cover these sections:

• Test type (thermal cycling, vibration, humidity, voltage stress, power-on/off)
• Standard reference (IEC 60068-2-xx, ISO 16750, JESD22)
• Test duration, temperature range, cycle count
• Acceptance criterion (e.g., no function loss, deviation less than 5%, no visual damage)
• Sample count to be used (n ≥ 3 recommended)
• Post-test analysis method (FA – Failure Analysis, Weibull or Arrhenius predictions)

RTP should be linked with QAP (Quality Assurance Plan) or DVP&R (Design Validation Plan & Report) document in quality management system.

Environmental Durability Tests​

5. Is Thermal Cycling test planned?​

Thermal cycling test is applied to verify solder joints, component–PCB expansion differences, and material fatigue on board.

• Test standard: JEDEC JESD22-A104D
• Test range: –40 °C ↔ +85 °C (typically 200–500 cycles)
• Transfer time: Less than 10 minutes (between cold/hot chamber)
• Dwell time: 10 minutes or more at each temperature
• Monitoring criteria: Solder cracks, delamination, parameter drift (%±5), visual damage
• Thermal profile should be calibrated according to device temperature (TC sensor 3 points or more)

This test is the most critical step for long-term reliability of PCB and solder joints.

6. Is Temperature/Humidity combination test being applied?​

This test evaluates condensation, moisture penetration, and insulation resistance drop effects.

• Test standard: JEDEC JESD22-A101 or IEC 60068-2-78
• Typical conditions: 85 °C / 85% RH / 1000 hours
• Alternative: 65 °C / 95% RH / 500 hours (according to product class)
• Sample count: 3 or more
• Post-test: Insulation resistance, function test, optical inspection
• Long-term moisture resistance of coatings (conformal coating) and plastic enclosures is verified with this test

This condition is considered mandatory for industrial and outdoor applications.

7. Is Thermal Shock test performed?​

Thermal shock test measures responses of different materials to sudden temperature changes — especially important for heatsink mounting, PCB via structure, and cable connections.

• Test standard: JEDEC JESD22-A106 / MIL-STD-883 Method 1011
• Test range: –40 °C → +125 °C
• Transfer time: 10 seconds or less
• Dwell time: 10–15 minutes at each end
• Cycle count: 100–200
• Measured parameters: mechanical crack, color change, ±5% resistance change, component displacement

This test evaluates mechanical stress–thermal expansion difference relationship.

8. Are High-Temperature Storage (HTS) and Low-Temperature Storage (LTS) tests planned?​

These tests verify whether product maintains functional integrity even in long-term storage and transportation conditions.

• Standards: JEDEC JESD22-A103 (HTS) and A119 (LTS)
• High temperature: +125 °C / 1000 hours (passive storage)
• Low temperature: –55 °C / 500 hours
• Function and insulation tests should be performed post-test
• ESR change in capacitors, color degradation and mechanical deformation in polymers should be checked

This test provides assurance for logistics and service spare parts processes.

9. Is UV and sunlight resistance test (UV Exposure / ASTM G154) required?​

UV resistance should be verified for outdoor or sun-exposed products.

• Test standard: ASTM G154 / ISO 4892-2 (Fluorescent UV Exposure)
• Condition: UV-A/UV-B cycle, 8 hours UV + 4 hours condensation
• Total duration: 1000 hours or 3-month cycle equivalent
• Monitored parameters: color change (ΔE less than 2), surface cracking, mechanical strength, logo/label fading
• Coating or paint system should contain UV stable additives

This test is standard requirement for IP65+ outdoor devices.

10. Are dust, moisture, and liquid protection tests defined according to IP rating (IEC 60529)?​

Product design should be verified with appropriate IP protection class (Ingress Protection) for usage environment:

• IP5X/IP6X: Protection against dust ingress
• IPX4–IPX9K: Water spray, immersion, or high-pressure wash tests
• Test standard: IEC 60529
• Test conditions: Water flow rate, pressure, distance, and duration should be specified in detail
• Device should pass function and insulation test after IP test

Mechanical Durability and Vibration Tests​

11. Is Vibration test (Sine / RMS Random Vibration) being applied?​

Vibration test simulates continuous vibration conditions device will experience during transportation, field installation, or operation on motorized equipment.

• Test standard: IEC 60068-2-6 (Sinusoidal) or MIL-STD-810G/H Method 514.6 (Random)
• Frequency range: 10 Hz – 2000 Hz
• Amplitude: 0.35 mm (10–60 Hz) / 5 g (60–2000 Hz)
• RMS random vibration: 0.04 g²/Hz typical (3 axes, 1 hour/axis)
• Product mounting direction and fixation method should match actual usage conditions
• Post-test mechanical loosening, solder break, screw torque loss, and function control should be performed

12. Are Shock Test and Drop Test planned?​

This test evaluates product's resistance to sudden accelerations it will encounter during transportation and field use.

• Test standard: IEC 60068-2-27, MIL-STD-810G Method 516.6, ISTA 1A / ASTM D4169
• Typical conditions:
  • 15–30 g, 6–11 ms (functional shock)
  • 50–75 g, 3–6 ms (transport shock)
• Drop tests by product class:
  • Handheld devices: 1 m – 6 surfaces
  • Industrial modules: 0.5 m – 3 directions
• ISTA 2A profile should be applied in packaged tests

Post-test cracks, breaks, connector deformation, and performance loss are checked.

13. Are loosening / breaking tests of mechanical fasteners defined?​

Resistance of all mechanical fasteners (screw, nut, clip, pin) should be verified:

• Screw loosening test: Should be applied according to DIN 65151 (Junker Test) standard
• Torque resistance: Should be tested 10% below and 25% above nominal value
• Break / rupture test: Maximum load capacity + safety factor (1.5× nominal load or more)
• Post-test screw torque, pull-out, and deformation should be measured

14. Is Post-Vibration Functional Test being applied?​

Product's electrical and mechanical functions should be rechecked after vibration test.

• All inputs/outputs, communication ports, and sensor responses should be measured in function test
• Continuity test should be performed especially for BGA, LGA, and QFN components solder joints
• "Powered vibration test" (vibration while operating) should be applied if necessary
• Test result: No failure, reset, contact error, power interruption, or data loss should occur

15. Is PCB flex and mechanical stress (PCB Flex) test performed?​

PCB flex test verifies whether PCB has cracking or breaking risk under mechanical deformation.

• Test standard: IPC-9701B and JEDEC JESD22-B113
• Bending angle: ±5°–10° (between end supports)
• Cycle count: 1000–5000
• Monitored parameters: solder crack, delamination, resistance change (%±5), pad lift
• Critically important especially for BGA, QFN, CSP packages
• If PCB thickness is 1.6 mm or less, use of support plates or stiffeners should be verified with test

This test is part of fatigue reliability analysis.

Electrical and Thermal Durability​

16. Are overcurrent and surge/inrush resistance tests applied?​

Product should be tested against transient events from mains or power supply:

• Test standard: IEC 61000-4-5 (Surge Immunity)
• Waveform: 1.2/50 µs (voltage) and 8/20 µs (current)
• Typical level: ±1 kV (differential), ±2 kV (common mode)
• Power inputs, communication lines, and external connections should be included in test
• Inrush (initial current surge) test should be performed separately; current at cold start should be 2.5× nominal or less

This test verifies effectiveness of protection circuits against power fluctuations and mains transients.

17. Is Temperature Rise test performed?​

Temperature rise (ΔT) should be measured on traces carrying high current, connectors, and power semiconductors.

• Test standard: IEC 60990 / IEC 62368-1 Annex G
• Temperature rise limit:
  • PCB traces and copper paths: ΔT 40 °C or less
  • Connectors and terminals: ΔT 30 °C or less
  • Enclosure surface (touchable): below 60 °C (for user safety)
• Test conditions should be between 100–125% of nominal current
• Measurement method: thermocouple + IR camera; results should be documented in "Thermal Map Report"

This test is mandatory for verification of current carrying capacity and thermal balance.

18. Are short circuit, reverse polarity, ESD, and EFT tests included in product durability?​

Device should be tested against faulty connections and transient events that may occur during operation:

• Short circuit test: Protection circuits (fuse, OCP, crowbar) should activate under power line short circuit condition
• Reverse polarity test: No permanent damage should occur when wrong polarity or phase is applied to input
• ESD test: ±8 kV air, ±6 kV contact resistance according to IEC 61000-4-2
• EFT/Burst test: IEC 61000-4-4, 5/50 ns pulse series (±1–2 kV)

Functional performance evaluation should be performed after each test.

19. Are Power Cycle and restart tests performed?​

Product's reliable operation under power cycling must be verified:

• Test standard: IEC 60068-2-2/27 (cyclic stress) or MIL-STD-202 Method 107
• Typical cycle: ON: 60 s / OFF: 10 s, 10,000–50,000 cycles
• System should not experience reset, latch-up, or memory corruption during test
• Device should deterministically return to "normal operation mode" when power returns
• This test is especially important for microcontrollers, RTC, power sequencing circuits

20. Is operation verified with temperature profile for critical components (Thermal Mapping)?​

Device's temperature distribution during operation should be monitored:

• Measurement methods: IR camera, thermocouple matrix, digital sensor network (DS18B20 / PT1000)
• Mapping points: MCU, power ICs, LDO, inductor, MOSFET, connector
• Normal condition: ambient +25 °C, high load: +60 °C
• Critical component temperatures should be below manufacturer recommendation (e.g., MOSFET below 125 °C, MCU below 85 °C)
• Measurements can be verified with thermal analysis software (ANSYS, Simcenter, FloTHERM)

This test determines thermal design reliability and component life (Arrhenius model) accuracy.

Chemical and Corrosion Tests​

21. Is Salt Spray (ASTM B117) test planned?​

This test is applied to evaluate corrosion resistance of metal surfaces, screws, and fasteners.

• Test standard: ASTM B117 or ISO 9227 (Neutral Salt Spray – NSS)
• Solution: 5% NaCl, pH 6.5–7.2
• Temperature: 35 ± 2 °C
• Duration: 48–240 hours (according to material class)
• Observation: rust spot, color change, bubbling, surface pitting rate (%)
• Post-test adhesion and torque control should be performed for coated parts

This test is mandatory especially for galvanized, nickel, zinc, or aluminum anodized surfaces.

22. Is electrochemical migration (ECM) risk evaluated in humid environment?​

High humidity and ionic contaminants on PCB can lead to metallic bridge formation (ECM) between traces.

• Test standard: IPC-TM-650 2.6.3.7 / IEC 60068-2-78
• Test condition: 85 °C / 85% RH, 1000 hours
• Applied voltage: 5–50 VDC range
• Measurement: leakage current and surface insulation resistance (SIR greater than 10⁸ Ω)
• Ionic residues after PCB production should be checked with ROSE (Resistivity of Solvent Extract) test

This evaluation provides direct information about conformal coating quality and cleaning process adequacy.

23. Were materials changed based on corrosion test results (pass/fail)?​

If failure is observed in salt, humidity, or chemical tests, relevant component or coating should undergo material revision.

• Evaluation: "Red Rust" formation time, surface pitting depth, color loss
• For parts with low corrosion resistance:
  • Alternative coating (e.g., nickel or aluminum anodize instead of zinc)
  • Higher corrosion class fasteners (A4 stainless steel)
• Post-revision retest should be performed and "Corrective Action Report (CAR)" created

24. Are color / gloss changes measured on coating or paint surfaces?​

Optical degradation analysis should be performed on painted, coated, or labeled surfaces after UV, humidity, and salt tests:

• Test standard: ASTM D2244 (Color Difference), ASTM D523 (Gloss Measurement)
• Measurement device: Spectrophotometer or glossmeter (20°, 60° angle)
• Acceptance criteria:
  • Color difference (ΔE) 2.0 or less
  • Gloss change (ΔGloss) 10% or less
• Surface cracking, bubbling, peeling, or logo deformation should be visually checked

This test is important for cosmetic quality and brand durability.

Accelerated Life Tests (HALT / HASS)​

25. Is HALT (Highly Accelerated Life Test) being applied?​

HALT is accelerated life test used to identify physical limits of design.

• Test conditions: temperature, vibration, and electrical stress applied simultaneously
• Typical temperature range: –60 °C → +130 °C
• Vibration: 5–50 grms (6 axes, 5–20 Hz random)
• Voltage stress: ±20–30% range of nominal
• Purpose: determine device's limit of operating (LOL) and limit of destruction (LOD) values
• Measured outputs: functional failure threshold, reset, latch-up, component loosening, thermal drift

HALT is applied during product development phase (Design Validation) and provides data for design improvement.

26. Is HASS (Highly Accelerated Stress Screen) integrated into production process?​

HASS is used to detect latent defects from production line early.

• 50–70% of stress limits determined from HALT results is applied
• Test duration typically 10–20 minutes / product
• HASS is screening test; device should not be damaged
• Typical combination: thermal cycling + random vibration + power cycling
• Application frequency: every production batch or 10% sampling rate

This practice increases repeatable reliability (process capability Cp/Cpk) in production quality.

27. Are failure modes from HALT/HASS tests incorporated into FMEA?​

All failure modes observed during HALT and HASS tests should be incorporated into FMEA (Failure Mode and Effects Analysis) document. FMEA columns should be updated for each failure:

• Failure Mode → observed failure (e.g., connector loosening)
• Cause → root cause (e.g., vibration frequency resonance)
• Detection → HALT/HASS detection method
• Occurrence and Severity scores should be revised

Updated FMEA version should be archived in quality system with "HALT Revision Update" tag.

28. Is improvement cycle (Corrective Action) closed based on test results?​

Corrective action (CAPA) process should be initiated and closed for weak points identified after HALT/HASS.

• RCA (Root Cause Analysis) should be done in 5Why or 8D format
• Actions: material change, layout optimization, cooling enhancement, mechanical reinforcement, etc.
• Verification HALT should be performed after each action
• Process should be "closed loop" and closed in quality system

Data Collection and Reporting​

29. Are acceptance criteria clearly defined for all tests?​

Measurement parameters and acceptance limits should be predefined for each test. Measurement unit, limit value, and tolerance should be specified for each parameter in test plan. Example:

• Resistance tolerance: ±5%
• Leakage current: Less than 1 µA
• Function test: "Must operate 24 hours without reset"

Pass/fail decisions should be based on measurable metrics. These limits should be compatible with Product Specification and DVP&R (Design Verification Plan & Report) document.

30. Are test results stored in electronic format (PDF/CSV/ERP)?​

All test results should be archived digitally in version-controlled format.

• Report formats: PDF (final report), CSV (measurement data), XML/JSON (automatic system integration)
• File naming standard: RLT_PCBv1.3_2025-11-04.csv
• ERP/QMS integration: test results should be automatically linked with part code, revision, test type
• Reports should be stored on secure server or cloud system for at least 5 years

31. Is root cause analysis performed for Failure Modes (5 Why / Fishbone)?​

Root cause analysis (RCA) should be performed and documented for each failure observed in tests. Analysis methods:

• 5 Why (Why-Why Analysis)
• Fishbone Diagram (Ishikawa / Cause–Effect Analysis)
• 8D Problem Solving

Findings should be incorporated into relevant FMEA (Design / Process) document. "Containment–Correction–Prevention" stages should be completed.

32. Are post-test part photos, measurement data, and observations archived?​

All test results should be supported with visual and quantitative evidence.

• Pre-test and post-test product photos (high resolution) should be archived
• Measurement screenshots, thermal camera outputs, and oscilloscope data should be filed
• "Sample ID" label for each test sample should be used, included in report
• Visual records should be linked to test system with QR code or barcode

33. Is Reliability Summary Report submitted to management review?​

Results from all tests should be submitted to management review in Reliability Summary Report format. Report content:

• Summary of applied tests and standard references
• Passed / remaining tests (pass/fail ratio)
• Detected failures, root causes, and corrective actions
• Product MTBF / FIT estimate updates
• Conclusion: "Product meets / does not meet reliability target"

Report is mandatory at project closure (Gate Review) or production approval (PPAP / PRR) stage.